Heraeus Electronics is a leading manufacturer of materials for the assembly and packaging of devices in the electronics industry. The company offers a broad product portfolio for the automotive, power electronics and semiconductor market – ranging from metal ceramic substrates and bonding wires to assembly and thick film materials.
Around 1,500 employees are working at Heraeus Electronics globally, fully focused on providing innovative materials and superior services for the electronics packaging and component industry. Dedicated to serving local needs and to partnering with its customers, the company established 6 R&D centers in USA, Europe, and Asia. Comprehensive state-of-the-art equipment helps its customers benefit from reduced development risks and shortened development cycles with higher first-time success rates, leading to faster time to market rollouts. With 8 production sites in 6 countries, Heraeus electronics offers extensive manufacturing capabilities based on leading compliance and environmental standards, transparency, and financial stability.
Dedicated to serving local needs and to partnering with its customers, the company established 6 R&D centers in USA, Europe, and Asia.
Role in the project
Heraeus Electronics is contributing to WP4 and WP5 and is leading the subtask T4.1.1 ‘Advanced interconnects & substrate materials for GaN packaging’. Within WP4 assembly materials will be developed and applied and in WP5 reliability will be tested and the understanding supported with FE-simulation.
Heraeus Electronics manufactures materials for the packaging of semiconductors and offers services for assembly, simulation, and testing. Main contribution is the development a highly reliable interconnect for power transmission. A Die Top Interconnect System is designed, applied, and tested which allows heavy Cu wire or ribbon bonding on GaN devices. An alternative approach is the development of a fine pitch sinter paste for flip chip application, which will be developed. Testing and FE-Simulation will be applied to understand failure mechanisms in GaN package, and a lifetime model will be derived to apply it to other package designs.