Every Watt

... because they sum up
     to TeraW!

Work Plan

ALL2GaN is based on a classical work package structure including 7 work packages and 11 use cases. The project covers the entire vertical value chain of GaN power and RF electronics, from technology, integration and packaging, reliability until applications.

All project-work is related to 8 highly ambitious overall project objectives. The work packages are structured into Semiconductor Technologies (WP1-WP3), Packaging Technologies (WP4), Reliability and Robustness (WP5) and Use Cases and Applications (WP6).

In total the diverse technologies will be used for 11 Use Cases in the fields of telecommunication, transport, data center, renewable, smart grid and smart city. All fields are closely interlinked with several feedback loops and interactions. Thus, the project is well suited to encounter the challenges of today’s society.

WP1: GaN power devices and IC’s up to 100V and substrate topics

WP leader: IMEC

WP partners: MinDCet, AIX, Fraunhofer, IMS, NaMLab, TUDelft, STUBA, Alixlabs, RISE, SweGaN

In WP1, a new low voltage GaN technology (40V to 100V) on 200mm Si and SOI substrates will be researched, to achieve a higher level of maturity and device performance. To enable more energy efficient low voltage operations a new GaN epitaxial stack with a thin dedicated buffer structure will be developed. Further activities e.g. optimization of device and circuit design, in-depth material analysis, innovative devices processing and characterization and the research on new process technologies will support this objective. Moreover, within WP1, alternative substrates for GaN technology will be explored, both for the sub 100V and 1200V range. Additionally, the integration of a ferroelectic material in the gate architecture of a HEMT device will be researched, with the aim to swith the device between depletion and enhancement mode.

These activities are directly in line with the overall project objective 1 of exploring the limits of industrial GaN devices and systems-on-chip approaches for ≤100V and objective 2 exploring the potentials of innovative substrates for GaN. By investigating novel materials, GaN epitaxial stack and new design ALL2GaN will work on the improvement of the electrical performance, reliability and yield of low voltage GaN devices and circuits.

WP2: Novel solutions for lateral GaN devices and integrated circuits (≥650V)

WP leader: IFAT

WP partners: KAI, TUWien, IMEC, MinDCet, THERMO, VUT, AIX, Fraunhofer, IFAG, IESL-FORTH, ATT, Corintis, EPFL

WP2 focuses on the realization of high voltage lateral GaN devices and integrated circuits. Within this work package we will enable the high volume production of advanced 650V pGaN technology on 200mm wafers by reducing chip size, improving defect density, and enhancing process capability. Moreover, to optimize the costs for GaN-on-Si devices further, scaling up from 200mm to 300mm wafer size is a strong focus. Thereby, the buffer thickness on 300mm Si substrates is targeted to approach the 650V soft breakdown limit. In addition, integrated GaN HV solutions with molothic GaN power ICs will be studied to provide a device library and initial process design kit, deduced from the discrete technology process to enable GaN-circuits including the power devices. Another aim of WP2 is to develop and demonstrate experimentally an advanced and unique platform for future efficient electronic devices with much higher voltages and smaller device sizes on a low-cost GaN-on-Si platform, together with integrated on-chip thermal management technologies.

Furthermore, novel device solutions for higher voltages up to 1200V lateral p-GaN HEMT devices, higher shrink for lower area, advanced integrated cooling concepts will be explored. The key aspects of intrinsic defects relevant for device performance, reliability, and yield as well as novel non-destructive detection capabilities will be addressed.

WP3: Affordable high performance RF GaN with novel integration

WP leader: IFAG

WP partners: IFAT, AIX, Fraunhofer, Chalmers, EAB

In WP3 a high performance RFGaN technology is developed with a novel integration to enable higher performance and lower cost on a system level. The more advanced processing capabilities will enable to mitigate the fundamental disadvantages of GaN on silicon compared to GaN on SiC and in some critical aspects even push beyond GaN-SiC state-of-the-art. In addition, a new surface mount power transistor (SMPT) technology will be developed to enable new building practice to simultaneously achieve higher performance and lower cost on an application and system level, which will be demonstrated in the wireless infrastructure of UC1. This technology will have significant system level benefits for 6G deployment. The design of the UC1 SMPT demonstrator (WP6) will be developed in WP3.

WP4: Integration and packaging of GaN devices

WP leader: SAL

WP partners: Fronius, TUGraz, CWM, Fraunhofer, Heraeus, IFAG, IMS, NanoWired, TUC, Nexperia, TUDelft, EAB, RISE

Within WP4, manifold integration and packaging of GaN devices will be researched on different levels, from bare dies via system-on chip to integrated modules via system-in-module. The WP4 partners will investigate technological paths to solve the current limitations of interconnects and packaging solutions, while at the same time minimizing parasitic loop-inductances, the power consumption and the footprint of GaN systems. Moreover, the technology investigation will also take the reliability and electrical performance into account. This work package has a strong influence on the overall device performance and thus, contribute to the overall project objectives.

WP5: Reliability from Components to Systems

WP leader: TUC

WP partners: IFAT, Fronius, TUGraz, AAU, CWM, Fraunhofer, Heraeus, IFAG, IMS, TUC, SIG, TUE, Delta, Nano, STUBA, 4FORES, IKERLAN, MGEP, PREMIUM, UPM, Chalmers, RISE

Directly linked to project objective 6, WP5 will develop and implement new concepts for more efficient reliability and robustness testing of GaN power devices from component to system levels for all relevant failure modes, demonstrator structures, and use cases. Based on these experimental findings, digital twins will be developed that can estimate the typical total lifetime before the fabrication of the first physical samples for a most efficient 'Design for Reliability' (DfR) of new devices. Using the developed prototypes in WP6, the digital twins will be verified and validated in different scenarios and applications. Compact version of the digital twins will be developed that are implementable directly in the power electronic systems. There, they assess the 'Remaining useful Life' (RUL) of the individual system during its field use for the sake of improved functional safety and availability by active prognostics and health management (PHM) and possible real-time adjustments of the operational mode if needed. The results of WP5 will provide inputs to WP1-WP3 for the improvement of lateral GaN devices, to WP4 for the development of advanced packaging strategies and to WP6 on application level.

WP6: Use Cases for greener and smarter applications

WP leader: IKERLAN

WP partners: IFAT, Fronius, SAL, TUGraz, AAU, Ballard, CE-LAB, Fraunhofer, IFAG, IMST, TUC; AME, SIG, TUE, Delta, Nano, 4FORES, IKERLAN, PREMIUM, UPM, Chalmers, EAB

The target of this work package is to evaluate and quantify the benefits of the new developed GaN devices in real RF and power applications. The chosen highly benefitting applications are grouped into three main fields: radio frequency and communication, electric mobility (e.g. railway, electric vehicle) and energy (e.g. PV, DC microgrid, lighting).

Using the new devices developed in WP1 to WP4, the use cases will assess and demonstrate the achieved higher efficiencies, higher switching frequencies and higher power densities of the ALL2GaN applications without penalizing the reliability. The developed prototypes in WP6 will demonstrate the potential of the project GaN devices to significantly improve the system performance and thereby contributing to objective 7 and objective 8 of this project.

WP7: Project Management, Dissemination and Exploitation

WP leader: IFAT

WP partners: All

This work package is split into three main objectives: Management and Risk Mitigation, Dissemination and Exploitation. Infineon Technologies Austria AG (IFAT), overseeing the technical content as well as the administration to manage resources and results according to the project plan and thus ensuring exploitation, will lead the project. A team of highly experienced people with controlling, financial and legal backgrounds will support these tasks. In WP7 the project coordinator will closely work together with the dissemination leader in order to also properly spread the project results among diverse stakeholder groups and communities in Europe.